Hi JA,
The Infineon SLB9670 does not require SPI wait states. In fact it is the only TPM module that doesn't require the SPI wait states.
Some things to try:
1) Lowering or increasing the SPI bus speed.
2) Give additional time for the SPI CS and first clock
3) Make sure your SPI mode is 0 (CPOL=0, CPHA=0).
For reference: To use a SPI wait state:
1) Assert chip select (low)
2) Send 4 byte header
3) Read a single byte and checks for the MSB (0x80) is set (read single byte until set) Typically 1-2 times.
4) Read remainder
5) De-assert chip select (high)
Here is a simple get capabilities for an Infineon SLB9670 on my Raspberry Pi:
PI4:pi@raspberrypi:~/wolftpm $ ./examples/wrap/wrap_test
TPM2 Demo for Wrapper API's
Found TPM @ /dev/spidev0.0
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 00 00 | .....
00 00 00 01 a1 | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 00 00 | .....
40 00 00 01 a1 | @....
TPM2_IoCb: Ret 0, Sz 8
83 d4 00 14 00 00 00 00 | ........
40 00 00 01 97 06 00 30 | @......0
TPM2_IoCb: Ret 0, Sz 8
83 d4 0f 00 00 00 00 00 | ........
00 00 00 01 d1 15 1b 00 | ........
TPM2_IoCb: Ret 0, Sz 5
80 d4 0f 04 00 | .....
00 00 00 01 16 | .....
TPM2: Caps 0x30000697, Did 0x001b, Vid 0x15d1, Rid 0x16
Command: 12
80 01 00 00 00 0c 00 00 01 44 00 00 | .........D..
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 44 | @...D
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
40 00 00 01 ff 00 | @.....
TPM2_IoCb: Ret 0, Sz 16
0b d4 00 24 80 01 00 00 00 0c 00 00 01 44 00 00 | ...$.........D..
00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 | ................
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 0c | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 20 | ....
40 00 00 01 00 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 84 | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 94 | @....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
00 00 00 01 0a 00 | ......
TPM2_IoCb: Ret 0, Sz 14
89 d4 00 24 00 00 00 00 00 00 00 00 00 00 | ...$..........
00 00 00 01 80 01 00 00 00 0a 00 00 01 00 | ..............
Response: 10
80 01 00 00 00 0a 00 00 01 00 | ..........
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 40 | ....@
00 00 00 01 00 | .....
TPM2_Startup pass
Command: 11
80 01 00 00 00 0b 00 00 01 43 01 | .........C.
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 44 | ....D
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
40 00 00 01 ff 00 | @.....
TPM2_IoCb: Ret 0, Sz 15
0a d4 00 24 80 01 00 00 00 0b 00 00 01 43 01 | ...$.........C.
00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 | ...............
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 0c | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 20 | ....
40 00 00 01 00 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 84 | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 80 | @....
...
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 80 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 94 | @....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
00 00 00 01 0a 00 | ......
TPM2_IoCb: Ret 0, Sz 14
89 d4 00 24 00 00 00 00 00 00 00 00 00 00 | ...$..........
00 00 00 01 80 01 00 00 00 0a 00 00 00 00 | ..............
Response: 10
80 01 00 00 00 0a 00 00 00 00 | ..........
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 40 | ....@
00 00 00 01 00 | .....
TPM2_SelfTest pass
Command: 22
80 01 00 00 00 16 00 00 01 7a 00 00 00 06 00 00 | .........z......
01 05 00 00 00 08 | ......
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 44 | ....D
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
40 00 00 01 ff 00 | @.....
TPM2_IoCb: Ret 0, Sz 26
15 d4 00 24 80 01 00 00 00 16 00 00 01 7a 00 00 | ...$.........z..
00 06 00 00 01 05 00 00 00 08 | ..........
00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 | ................
00 00 00 00 00 00 00 00 00 00 | ..........
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 0c | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 20 | ....
40 00 00 01 00 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 84 | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 84 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 94 | @....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
40 00 00 01 53 00 | @...S.
TPM2_IoCb: Ret 0, Sz 14
89 d4 00 24 00 00 00 00 00 00 00 00 00 00 | ...$..........
00 00 00 01 80 01 00 00 00 53 00 00 00 00 | .........S....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 94 | .....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
40 00 00 01 49 00 | @...I.
TPM2_IoCb: Ret 0, Sz 68
bf d4 00 24 00 00 00 00 00 00 00 00 00 00 00 00 | ...$............
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | ................
00 00 00 00 | ....
00 00 00 01 01 00 00 00 06 00 00 00 08 00 00 01 | ................
05 49 46 58 00 00 00 01 06 53 4c 42 39 00 00 01 | .IFX.....SLB9...
07 36 37 30 00 00 00 01 08 00 00 00 00 00 00 01 | .670............
09 00 00 00 00 00 00 01 0a 00 00 00 00 00 00 01 | ................
0b 00 07 00 | ....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 94 | .....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
00 00 00 01 09 00 | ......
TPM2_IoCb: Ret 0, Sz 13
88 d4 00 24 00 00 00 00 00 00 00 00 00 | ...$.........
00 00 00 01 55 00 00 01 0c 00 11 cb 00 | ....U........
Response: 83
80 01 00 00 00 53 00 00 00 00 01 00 00 00 06 00 | .....S..........
00 00 08 00 00 01 05 49 46 58 00 00 00 01 06 53 | .......IFX.....S
4c 42 39 00 00 01 07 36 37 30 00 00 00 01 08 00 | LB9....670......
00 00 00 00 00 01 09 00 00 00 00 00 00 01 0a 00 | ................
00 00 00 00 00 01 0b 00 07 00 55 00 00 01 0c 00 | ..........U.....
11 cb 00 | ...
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 40 | ....@
00 00 00 01 00 | .....
Command: 22
80 01 00 00 00 16 00 00 01 7a 00 00 00 06 00 00 | .........z......
01 2d 00 00 00 01 | .-....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 44 | ....D
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
40 00 00 01 ff 00 | @.....
TPM2_IoCb: Ret 0, Sz 26
15 d4 00 24 80 01 00 00 00 16 00 00 01 7a 00 00 | ...$.........z..
00 06 00 00 01 2d 00 00 00 01 | .....-....
00 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 | ................
00 00 00 00 00 00 00 00 00 00 | ..........
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 84 | .....
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 20 | ....
40 00 00 01 00 | @....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 84 | .....
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
40 00 00 01 94 | @....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
00 00 00 01 1b 00 | ......
TPM2_IoCb: Ret 0, Sz 14
89 d4 00 24 00 00 00 00 00 00 00 00 00 00 | ...$..........
00 00 00 01 80 01 00 00 00 1b 00 00 00 00 | ..............
TPM2_IoCb: Ret 0, Sz 5
80 d4 00 18 00 | .....
00 00 00 01 94 | .....
TPM2_IoCb: Ret 0, Sz 6
81 d4 00 19 00 00 | ......
00 00 00 01 11 00 | ......
TPM2_IoCb: Ret 0, Sz 21
90 d4 00 24 00 00 00 00 00 00 00 00 00 00 00 00 | ...$............
00 00 00 00 00 | .....
00 00 00 01 01 00 00 00 06 00 00 00 01 00 00 01 | ................
2d 00 00 00 01 | -....
Response: 27
80 01 00 00 00 1b 00 00 00 00 01 00 00 00 06 00 | ................
00 00 01 00 00 01 2d 00 00 00 01 | ......-....
TPM2_IoCb: Ret 0, Sz 5
00 d4 00 18 40 | ....@
00 00 00 01 00 | .....
Mfg IFX (1), Vendor SLB9670, Fw 7.85 (4555), FIPS 140-2 1, CC-EAL4 1
Thanks,
David Garske, wolfSSL