We would like to announce that the CyaSSL embedded SSL library now has support for hardware-based cryptography and random number generation offered by the STM32F2.  Supported cryptographic algorithms include AES (CBC, CTR), DES (ECB, CBC), 3DES, MD5, and SHA1.  For details regarding the STM32F2 crypto and hash processors, please see the STM32F2xx Standard Peripheral Library document (linked below). 

If you are using the STM32F2 with CyaSSL, you can see substantial speed improvements when using the hardware crypto versus using CyaSSL’s software crypto implementation.  The following benchmarks were gathered from the CTaoCrypt benchmark application (ctaocrypt/benchmark/benchmark.c) running on the STM3221G-EVAL board (STM32F2) using the STM32F2 Standard Peripheral Library and FreeRTOS.

CyaSSL Software Crypto, Normal Big Integer Math Library

AES        1024 kB took 0.822 seconds,   1.22 MB/s
ARC4      1024 KB took 0.219 seconds,   4.57 MB/s
DES        1024 KB took 1.513 seconds,   0.66 MB/s
3DES      1024 KB took 3.986 seconds,   0.25 MB/s

MD5         1024 KB took 0.119 seconds,   8.40 MB/s
SHA         1024 KB took 0.279 seconds,   3.58 MB/s
SHA-256   1024 KB took 0.690 seconds,   1.45 MB/s

RSA 2048 encryption took 111.17 milliseconds, avg over 100 iterations
RSA 2048 decryption took 1204.77 milliseconds, avg over 100 iterations
DH  2048 key generation   467.90 milliseconds, avg over 100 iterations
DH  2048 key agreement   538.94 milliseconds, avg over 100 iterations

STM32F2 Hardware Crypto, Normal Big Integer Math Library

AES        1024 kB took 0.105 seconds,   9.52 MB/s
ARC4      1024 KB took 0.219 seconds,   4.57 MB/s
DES        1024 KB took 0.125 seconds,   8.00 MB/s
3DES      1024 KB took 0.141 seconds,   7.09 MB/s

MD5         1024 KB took 0.045 seconds,  22.22 MB/s
SHA          1024 KB took 0.047 seconds,  21.28 MB/s
SHA-256   1024 KB took 0.690 seconds,   1.45 MB/s

RSA 2048 encryption took 111.09 milliseconds, avg over 100 iterations
RSA 2048 decryption took 1204.88 milliseconds, avg over 100 iterations
DH  2048 key generation  467.56 milliseconds, avg over 100 iterations
DH  2048 key agreement   542.11 milliseconds, avg over 100 iterations

As the above benchmarks (and chart) show, the hardware-based algorithms on the STM32 demonstrate significantly faster speeds than that of their software counterparts.

To enable STM32 hardware crypto and RNG support, define STM32F2_CRYPTO and STM32F2_RNG when building CyaSSL.  For a more complete list of defines which may be required, please see the CYASSL_STM32F2 define in <cyassl_root>/cyassl/ctaocrypt/settings.h.  You can find the most recent version of CyaSSL on GitHub, here: https://github.com/cyassl/cyassl.  STM32F2 hardware crypto and RNG support will also be included in the next official release of the CyaSSL lightweight SSL library.

If you would like to use CyaSSL with STM32 hardware-based cryptography or RNG, or have any questions, please contact us at info@yassl.com for more information.

CyaSSL embedded SSL library: http://yassl.com/yaSSL/Products-cyassl.html
STM32: http://www.st.com/internet/mcu/class/1734.jsp
STM32F2 Standard Peripheral Library documentation: http://www.st.com/internet/com/TECHNICA … 023896.pdf